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_INSTR_COMPLETEDDST_STREAM_0_CACHE_LINE_FETCHESVTQ_SUSPENDS_DUE_TO_CTX_CHANGEVTQ_LINE_FETCH_HITVEC_LOAD_INSTR_COMPLETEDFP_STORE_INSTR_COMPLETED_IN_LSUFPU_RENORMALIZATIONFPU_DENORMALIZATIONFP_STORE_CAUSES_STALL_IN_LSULD_ST_TRUE_ALIAS_STALLLSU_INDEXED_ALIAS_STALLLSU_ALIAS_VS_FSQ_WB0_WB1LSU_ALIAS_VS_CSQLSU_LOAD_HIT_LINE_ALIAS_VS_CSQ0LSU_LOAD_MISS_LINE_ALIAS_VS_CSQ0LSU_TOUCH_LINE_ALIAS_VS_FSQ_WB0_WB1LSU_TOUCH_ALIAS_VS_CSQLSU_LMQ_FULL_STALLFP_LOAD_INSTR_COMPLETED_IN_LSUFP_LOAD_SINGLE_INSTR_COMPLETED_IN_LSUFP_LOAD_DOUBLE_COMPLETED_IN_LSULSU_RA_LATCH_STALLLSU_LOAD_VS_STORE_QUEUE_ALIAS_STALLLSU_LMQ_INDEX_ALIASLSU_STORE_QUEUE_INDEX_ALIASLSU_CSQ_FORWARDINGLSU_MISALIGNED_LOAD_FINISHLSU_MISALIGN_STORE_COMPLETEDLSU_MISALIGN_STALLFP_ONE_QUARTER_FPSCR_RENAMES_BUSYFP_ONE_HALF_FPSCR_RENAMES_BUSYFP_THREE_QUARTERS_FPSCR_RENAMES_BUSYFP_ALL_FPSCR_RENAMES_BUSYFP_DENORMALIZED_RESULTL1_DATA_TOTAL_MISSESDISPATCHES_TO_FPR_ISSUE_QUEUELSU_INSTR_COMPLETEDLOAD_INSTR_COMPLETEDSS_SM_INSTR_COMPLETEDTLBIE_INSTR_COMPLETEDLWARX_INSTR_COMPLETEDMFSPR_INSTR_COMPLETEDREFETCH_SERIALIZATIONCOMPLETION_QUEUE_ENTRIES_OVER_THRESHOLDCYCLES_ONE_INSTR_DISPATCHEDCYCLES_TWO_INSTR_COMPLETEDITLB_NON_SPECULATIVE_MISSESCYCLES_WAITING_FROM_L1_INSTR_CACHE_MISSL1_DATA_LOAD_ACCESS_MISSL1_DATA_TOUCH_MISSL1_DATA_STORE_MISSL1_DATA_TOUCH_MISS_CYCLESL1_DATA_CYCLES_USEDDST_STREAM_1_CACHE_LINE_FETCHESVTQ_STREAM_CANCELED_PREMATURELYVTQ_RESUMES_DUE_TO_CTX_CHANGEVTQ_LINE_FETCH_MISSVTQ_LINE_FETCHTLBIE_SNOOPSL1_INSTR_CACHE_RELOADSL1_DATA_CACHE_RELOADSL1_DATA_CACHE_CASTOUTS_TO_L2STORE_MERGE_GATHERCACHEABLE_STORE_MERGE_TO_32_BYTESDATA_BKPT_MATCHESFALL_THROUGH_BRANCHES_PROCESSEDFIRST_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLYSECOND_SPECULATION_BUFFER_ACTIVEBPU_STALL_ON_LR_DEPENDENCYBTIC_MISSBRANCH_LINK_STACK_CORRECTLY_RESOLVEDFPR_ISSUE_STALLEDSWITCHES_BETWEEN_PRIV_USERLSU_COMPLETES_FP_STORE_SINGLEVR_ISSUE_QUEUE_DISPATCHESVR_STALLSGPR_RENAME_BUFFER_ENTRIES_OVER_THRESHOLDFPR_ISSUE_QUEUE_ENTRIESFPU_INSTR_COMPLETEDSTWCX_INSTR_COMPLETEDLS_LM_INSTR_PIECESITLB_HW_SEARCH_CYCLES_OVER_THRESHOLDDTLB_MISSESCANCELLED_L1_INSTR_CACHE_MISSESL1_DATA_CACHE_OP_HITL1_DATA_LOAD_MISS_CYCLESL1_DATA_PUSHESL1_DATA_TOTAL_MISSVT2_FETCHESTAKEN_BRANCHES_PROCESSEDBRANCH_FLUSHESSECOND_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLYTHIRD_SPECULATION_BUFFER_ACTIVEBRANCH_UNIT_STALL_ON_CTR_DEPENDENCYFAST_BTIC_HITBRANCH_LINK_STACK_MISPREDICTEDCYCLES_THREE_INSTR_COMPLETEDCYCLES_NO_INSTR_DISPATCHEDGPR_ISSUE_QUEUE_ENTRIES_OVER_THRESHOLDGPR_ISSUE_QUEUE_STALLEDIU1_INSTR_COMPLETEDDSSALL_INSTR_COMPLETEDTLBSYNC_INSTR_COMPLETEDSYNC_INSTR_COMPLETEDSS_SM_INSTR_PIECESDTLB_HW_SEARCH_CYCLESSNOOP_RETRIESSUCCESSFUL_STWCXDST_STREAM_3_CACHE_LINE_FETCHESTHIRD_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLYMISPREDICTED_BRANCHESFOLDED_BRANCHESFP_STORE_DOUBLE_COMPLETES_IN_LSUL2_CACHE_HITSL3_CACHE_HITSL2_INSTR_CACHE_MISSESL3_INSTR_CACHE_MISSESL2_DATA_CACHE_MISSESL3_DATA_CACHE_MISSESL2_LOAD_HITSL2_STORE_HITSL3_LOAD_HITSL3_STORE_HITSL2_TOUCH_HITSL3_TOUCH_HITSSNOOP_MODIFIEDSNOOP_VALIDINTERVENTIONL2_CACHE_MISSESL3_CACHE_MISSESL2_CACHE_CASTOUTSL3_CACHE_CASTOUTSL2SQ_FULL_CYCLESL3SQ_FULL_CYCLESRAQ_FULL_CYCLESWAQ_FULL_CYCLESL1_EXTERNAL_INTERVENTIONSL2_EXTERNAL_INTERVENTIONSL3_EXTERNAL_INTERVENTIONSEXTERNAL_INTERVENTIONSEXTERNAL_PUSHESEXTERNAL_SNOOP_RETRYDTQ_FULL_CYCLESBUS_RETRYL2_VALID_REQUESTBORDQ_FULLBUS_TAS_FOR_READSBUS_TAS_FOR_WRITESBUS_READS_NOT_RETRIEDBUS_WRITES_NOT_RETRIEDBUS_READS_WRITES_NOT_RETRIEDBUS_RETRY_DUE_TO_L1_RETRYBUS_RETRY_DUE_TO_PREVIOUS_ADJACENTBUS_RETRY_DUE_TO_COLLISIONBUS_RETRY_DUE_TO_INTERVENTION_ORDERINGSNOOP_REQUESTSPREFETCH_ENGINE_REQUESTPREFETCH_ENGINE_COLLISION_VS_LOADPREFETCH_ENGINE_COLLISION_VS_STOREPREFETCH_ENGINE_COLLISION_VS_INSTR_FETCHPREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCHPREFETCH_ENGINE_FULLCLKISSUERETNISSUESISSUEDISSUEIFIBRBRMISJJMISREPLAYIUNATRAPUULOADUUSTOREULOADUSTOREECMCCCCSRCCFETCHCPREFICAIIIPCIMISSWBUFWDATWBUFLDWBUFFLWBUFTRBADDBADDL2BFILLDDIDSIDIDSDIDNALDSLMLDSIOLDSDMLDSSTSLMSTSIOSTSIOBDMADTLBDTLBADITLBSYNCSYNCIOBSYNCWINSTR_EXECUTEDBRANCH_COMPLETEDBRANCH_MISPREDRETURNRETURN_MISPREDRETURN_NOT_31RETURN_NOTPREDITLB_ACCESSITLB_MISSDTLB_ACCESSDTLB_MISSJTLB_IACCESSJTLB_IMISSJTLB_DACCESSJTLB_DMISSIC_FETCHIC_MISSDC_LOADSTOREDC_WRITEBACKDC_MISSSTORE_MISSLOAD_MISSINTEGER_COMPLETEDFP_COMPLETEDLOAD_COMPLETEDSTORE_COMPLETEDBARRIER_COMPLETEDMIPS16_COMPLETEDNOP_COMPLETEDINTEGER_MULDIV_COMPLETEDRF_STALLINSTR_REFETCHSTORE_COND_COMPLETEDSTORE_COND_FAILEDICACHE_REQUESTSICACHE_HITL2_WRITEBACKL2_ACCESSL2_MISSL2_ERR_CORRECTEDEXCEPTIONSRF_CYCLES_STALLEDIFU_CYCLES_STALLEDALU_CYCLES_STALLEDUNCACHED_LOADUNCACHED_STORECP2_REG_TO_REG_COMPLETEDMFTC_COMPLETEDIC_BLOCKED_CYCLESDC_BLOCKED_CYCLESL2_IMISS_STALL_CYCLESL2_DMISS_STALL_CYCLESDMISS_CYCLESL2_MISS_CYCLESUNCACHED_BLOCK_CYCLESMDU_STALL_CYCLESFPU_STALL_CYCLESCP2_STALL_CYCLESCOREXTEND_STALL_CYCLESISPRAM_STALL_CYCLESDSPRAM_STALL_CYCLESCACHE_STALL_CYCLESLOAD_TO_USE_STALLSBASE_MISPRED_STALLSCPO_READ_STALLSBRANCH_MISPRED_CYCLESIFETCH_BUFFER_FULLFETCH_BUFFER_ALLOCATEDEJTAG_ITRIGGEREJTAG_DTRIGGERFSB_LT_QUARTERFSB_QUARTER_TO_HALFFSB_GT_HALFFSB_FULL_PIPELINE_STALLSLDQ_LT_QUARTERLDQ_QUARTER_TO_HALFLDQ_GT_HALFLDQ_FULL_PIPELINE_STALLSWBB_LT_QUARTERWBB_QUARTER_TO_HALFWBB_GT_HALFWBB_FULL_PIPELINE_STALLSREQUEST_LATENCYREQUEST_COUNTDATA_DEPENDENCY_STALLEDBRANCH_RETIREDINSTR_RETIREDDC_FULL_CYCLEDC_FULL_CONTIGDC_ACCESSPC_CHANGEBRANCH_RETIRED_ALLINSTR_CYCLECP_STALLPC_CHANGE_ALLPIPELINE_FLUSHBACKEND_STALLMULTIPLIER_USEMULTIPLIER_STALLEDDATA_CACHE_STALLEDL2_CACHE_REQL2_CACHE_MISSADDRESS_BUS_TRANSSELF_ADDRESS_BUS_TRANSDATA_BUS_TRANSDATA_MEM_REFSDCU_LINES_INDCU_M_LINES_INDCU_M_LINES_OUTDCU_MISS_OUTSTANDINGIFU_FETCHIFU_FETCH_MISSIFU_MEM_STALLILD_STALLL2_IFETCHL2_LDL2_STL2_LINES_INL2_LINES_OUTL2_M_LINES_INML2_M_LINES_OUTML2_RQSTSL2_ADSL2_DBUS_BUSYL2_DBUS_BUSY_RDBUS_DRDY_CLOCKSBUS_LOCK_CLOCKSBUS_REQ_OUTSTANDINGBUS_TRAN_BRDBUS_TRAN_RFOBUS_TRANS_WBBUS_TRAN_IFETCHBUS_TRAN_INVALBUS_TRAN_PWRBUS_TRANS_PBUS_TRANS_IOBUS_TRAN_DEFBUS_TRAN_BURSTBUS_TRAN_ANYBUS_TRAN_MEMBUS_DATA_RCVBUS_BNR_DRVBUS_HIT_DRVBUS_HITM_DRVBUS_SNOOP_STALLFLOPSFP_COMPS_OPS_EXEFP_ASSISTMULDIVCYCLES_DIV_BUSYLD_BLOCKSSB_DRAINSMISALIGN_MEM_REFEMON_KNI_PREF_DISPATCHEDEMON_KNI_PREF_MISSINST_RETIREDUOPS_RETIREDINST_DECODEDEMON_KNI_INST_RETIREDEMON_KNI_COMP_INST_RETHW_INT_RXCYCLES_INT_MASKEDCYCLES_INT_PENDING_AND_MASKEDBR_INST_RETIREDBR_MISS_PRED_RETIREDBR_TAKEN_RETIREDBR_MISS_PRED_TAKEN_RETBR_INST_DECODEDBTB_MISSESBR_BOGUSBACLEARSRESOURCE_STALLSPARTIAL_RAT_STALLSSEGMENT_REG_LOADSCPU_CLK_UNHALTEDMMX_INSTR_EXECMMX_SAT_INSTR_EXECMMX_UOPS_EXECMMX_INSTR_TYPE_EXECFP_MMX_TRANSMMX_ASSISTMMX_INSTR_RETSEG_RENAME_STALLSSEG_REG_RENAMESRET_SEG_RENAMESEMON_EST_TRANSEMON_THERMAL_TRIPBR_INST_EXECBR_MISSP_EXECBR_BAC_MISSP_EXECBR_CND_EXECBR_CND_MISSP_EXECBR_IND_EXECBR_IND_MISSP_EXECBR_RET_EXECBR_RET_MISSP_EXECBR_RET_BAC_MISSP_EXECBR_CALL_EXECBR_CALL_MISSP_EXECBR_IND_CALL_EXECEMON_SIMD_INSTR_RETIREDEMON_SYNCH_UOPSEMON_ESP_UOPSEMON_FUSED_UOPS_RETEMON_UNFUSIONEMON_PREF_RQSTS_UPEMON_PREF_RQSTS_DNEMON_SSE_SSE2_INST_RETIREDEMON_SSE_SSE2_COMP_INST_RETIREDDATA_READDATA_WRITEDATA_TLB_MISSDATA_READ_MISSDATA_WRITE_MISSWRITE_HIT_TO_M_OR_E_STATE_LINESDATA_CACHE_LINES_WRITTEN_BACKEXTERNAL_SNOOPSEXTERNAL_DATA_CACHE_SNOOP_HITSMEMORY_ACCESSES_IN_BOTH_PIPESBANK_CONFLICTSMISALIGNED_DATA_OR_IO_REFERENCESCODE_READCODE_TLB_MISSCODE_CACHE_MISSANY_SEGMENT_REGISTER_LOADEDBRANCHESBTB_HITSTAKEN_BRANCH_OR_BTB_HITPIPELINE_FLUSHESINSTRUCTIONS_EXECUTEDINSTRUCTIONS_EXECUTED_V_PIPEBUS_CYCLE_DURATIONWRITE_BUFFER_FULL_STALL_DURATIONWAITING_FOR_DATA_MEMORY_READ_STALL_DURATIONSTALL_ON_WRITE_TO_AN_E_OR_M_STATE_LINELOCKED_BUS_CYCLEIO_READ_OR_WRITE_CYCLENONCACHEABLE_MEMORY_READSPIPELINE_AGI_STALLSBREAKPOINT_MATCH_ON_DR0_REGISTERBREAKPOINT_MATCH_ON_DR1_REGISTERBREAKPOINT_MATCH_ON_DR2_REGISTERBREAKPOINT_MATCH_ON_DR3_REGISTERHARDWARE_INTERRUPTSDATA_READ_OR_WRITEDATA_READ_MISS_OR_WRITE_MISSBUS_OWNERSHIP_LATENCYBUS_OWNERSHIP_TRANSFERSMMX_INSTRUCTIONS_EXECUTED_U_PIPEMMX_INSTRUCTIONS_EXECUTED_V_PIPECACHE_M_LINE_SHARINGCACHE_LINE_SHARINGEMMS_INSTRUCTIONS_EXECUTEDTRANSITIONS_BETWEEN_MMX_AND_FP_INSTRUCTIONSBUS_UTILIZATION_DUE_TO_PROCESSOR_ACTIVITYWRITES_TO_NONCACHEABLE_MEMORYSATURATING_MMX_INSTRUCTIONS_EXECUTEDSATURATIONS_PERFORMEDNUMBER_OF_CYCLES_NOT_IN_HALT_STATEDATA_CACHE_TLB_MISS_STALL_DURATIONMMX_INSTRUCTION_DATA_READSMMX_INSTRUCTION_DATA_READ_MISSESFLOATING_POINT_STALLS_DURATIONTAKEN_BRANCHESD1_STARVATION_AND_FIFO_IS_EMPTYD1_STARVATION_AND_ONLY_ONE_INSTRUCTION_IN_FIFOMMX_INSTRUCTION_DATA_WRITESMMX_INSTRUCTION_DATA_WRITE_MISSESPIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONSPIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS_RESOLVED_IN_WB_STAGEMISALIGNED_DATA_MEMORY_REFERENCE_ON_MMX_INSTRUCTIONSPIPELINE_STALL_FOR_MMX_INSTRUCTION_DATA_MEMORY_READSMISPREDICTED_OR_UNPREDICTED_RETURNSPREDICTED_RETURNSMMX_MULTIPLY_UNIT_INTERLOCKMOVD_MOVQ_STORE_STALL_DUE_TO_PREVIOUS_MMX_OPERATIONRETURNSBTB_FALSE_ENTRIESBTB_MISS_PREDICTION_ON_NOT_TAKEN_BRANCHFULL_WRITE_BUFFER_STALL_DURATION_WHILE_EXECUTING_MMX_INSTRUCTIONSSTALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINETC_DELIVER_MODEBPU_FETCH_REQUESTITLB_REFERENCEMEMORY_CANCELMEMORY_COMPLETELOAD_PORT_REPLAYSTORE_PORT_REPLAYMOB_LOAD_REPLAYPAGE_WALK_TYPEBSQ_CACHE_REFERENCEIOQ_ALLOCATIONIOQ_ACTIVE_ENTRIESFSB_DATA_ACTIVITYBSQ_ALLOCATIONBSQ_ACTIVE_ENTRIESSSE_INPUT_ASSISTPACKED_SP_UOPPACKED_DP_UOPSCALAR_SP_UOPSCALAR_DP_UOP64BIT_MMX_UOP128BIT_MMX_UOPX87_FP_UOPX87_SIMD_MOVES_UOPGLOBAL_POWER_EVENTSTC_MS_XFERUOP_QUEUE_WRITESRETIRED_MISPRED_BRANCH_TYPERETIRED_BRANCH_TYPERESOURCE_STALLWC_BUFFERB2B_CYCLESBNRSNOOPRESPONSEFRONT_END_EVENTEXECUTION_EVENTREPLAY_EVENTUOP_TYPEMISPRED_BRANCH_RETIREDX87_ASSISTMACHINE_CLEARFP_DISPATCHED_FPU_OPSFP_CYCLES_WITH_NO_FPU_OPS_RETIREDFP_DISPATCHED_FPU_FAST_FLAG_OPSLS_SEGMENT_REGISTER_LOADLS_MICROARCHITECTURAL_RESYNC_BY_SELF_MODIFYING_CODELS_MICROARCHITECTURAL_RESYNC_BY_SNOOPLS_BUFFER2_FULLLS_LOCKED_OPERATIONLS_MICROARCHITECTURAL_LATE_CANCELLS_RETIRED_CFLUSH_INSTRUCTIONSLS_RETIRED_CPUID_INSTRUCTIONSDC_REFILL_FROM_L2DC_REFILL_FROM_SYSTEMDC_COPYBACKDC_L1_DTLB_MISS_AND_L2_DTLB_HITDC_L1_DTLB_MISS_AND_L2_DTLB_MISSDC_MISALIGNED_DATA_REFERENCEDC_MICROARCHITECTURAL_LATE_CANCELDC_MICROARCHITECTURAL_EARLY_CANCELDC_ONE_BIT_ECC_ERRORDC_DISPATCHED_PREFETCH_INSTRUCTIONSDC_DCACHE_ACCESSES_BY_LOCKSBU_CPU_CLK_UNHALTEDBU_INTERNAL_L2_REQUESTBU_FILL_REQUEST_L2_MISSBU_FILL_INTO_L2IC_REFILL_FROM_L2IC_REFILL_FROM_SYSTEMIC_L1_ITLB_MISS_AND_L2_ITLB_HITIC_L1_ITLB_MISS_AND_L2_ITLB_MISSIC_MICROARCHITECTURAL_RESYNC_BY_SNOOPIC_INSTRUCTION_FETCH_STALLIC_RETURN_STACK_HITIC_RETURN_STACK_OVERFLOWFR_RETIRED_X86_INSTRUCTIONSFR_RETIRED_UOPSFR_RETIRED_BRANCHESFR_RETIRED_BRANCHES_MISPREDICTEDFR_RETIRED_TAKEN_BRANCHESFR_RETIRED_TAKEN_BRANCHES_MISPREDICTEDFR_RETIRED_FAR_CONTROL_TRANSFERSFR_RETIRED_RESYNCSFR_RETIRED_NEAR_RETURNSFR_RETIRED_NEAR_RETURNS_MISPREDICTEDFR_RETIRED_TAKEN_BRANCHES_MISPREDICTED_BY_ADDR_MISCOMPAREFR_RETIRED_FPU_INSTRUCTIONSFR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONSFR_INTERRUPTS_MASKED_CYCLESFR_INTERRUPTS_MASKED_WHILE_PENDING_CYCLESFR_TAKEN_HARDWARE_INTERRUPTSFR_DECODER_EMPTYFR_DISPATCH_STALLSFR_DISPATCH_STALL_FROM_BRANCH_ABORT_TO_RETIREFR_DISPATCH_STALL_FOR_SERIALIZATIONFR_DISPATCH_STALL_FOR_SEGMENT_LOADFR_DISPATCH_STALL_WHEN_REORDER_BUFFER_IS_FULLFR_DISPATCH_STALL_WHEN_RESERVATION_STATIONS_ARE_FULLFR_DISPATCH_STALL_WHEN_FPU_IS_FULLFR_DISPATCH_STALL_WHEN_LS_IS_FULLFR_DISPATCH_STALL_WHEN_WAITING_FOR_ALL_TO_BE_QUIETFR_DISPATCH_STALL_WHEN_FAR_XFER_OR_RESYNC_BRANCH_PENDINGFR_FPU_EXCEPTIONSFR_NUMBER_OF_BREAKPOINTS_FOR_DR0FR_NUMBER_OF_BREAKPOINTS_FOR_DR1FR_NUMBER_OF_BREAKPOINTS_FOR_DR2FR_NUMBER_OF_BREAKPOINTS_FOR_DR3NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENTNB_MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOWNB_MEMORY_CONTROLLER_DRAM_COMMAND_SLOTS_MISSEDNB_MEMORY_CONTROLLER_TURNAROUNDNB_MEMORY_CONTROLLER_BYPASS_SATURATIONNB_SIZED_COMMANDSNB_PROBE_RESULTNB_HT_BUS0_BANDWIDTHNB_HT_BUS1_BANDWIDTHNB_HT_BUS2_BANDWIDTHDC_ACCESSESDC_MISSESDC_REFILLS_FROM_L2DC_REFILLS_FROM_SYSTEMDC_WRITEBACKSL1_DTLB_MISS_AND_L2_DTLB_HITSL1_AND_L2_DTLB_MISSESMISALIGNED_REFERENCESIC_FETCHESIC_MISSESL1_ITLB_MISSESL1_L2_ITLB_MISSESRETIRED_INSTRUCTIONSRETIRED_OPSRETIRED_BRANCHESRETIRED_BRANCHES_MISPREDICTEDRETIRED_TAKEN_BRANCHESRETIRED_TAKEN_BRANCHES_MISPREDICTEDRETIRED_FAR_CONTROL_TRANSFERSRETIRED_RESYNC_BRANCHESINTERRUPTS_MASKED_CYCLESINTERRUPTS_MASKED_WHILE_PENDING_CYCLESGQ_CYCLES_FULL.READ_TRACKERGQ_CYCLES_FULL.WRITE_TRACKERGQ_CYCLES_FULL.PEER_PROBE_TRACKERGQ_CYCLES_NOT_EMPTY.READ_TRACKERGQ_CYCLES_NOT_EMPTY.WRITE_TRACKERGQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKERGQ_OCCUPANCY.READ_TRACKERGQ_ALLOC.READ_TRACKERGQ_ALLOC.RT_L3_MISSGQ_ALLOC.RT_TO_L3_RESPGQ_ALLOC.RT_TO_RTID_ACQUIREDGQ_ALLOC.WT_TO_RTID_ACQUIREDGQ_ALLOC.WRITE_TRACKERGQ_ALLOC.PEER_PROBE_TRACKERGQ_DATA.FROM_QPIGQ_DATA.FROM_QMCGQ_DATA.FROM_L3GQ_DATA.FROM_CORES_02GQ_DATA.FROM_CORES_13GQ_DATA.TO_QPI_QMCGQ_DATA.TO_L3GQ_DATA.TO_CORESSNP_RESP_TO_LOCAL_HOME.I_STATESNP_RESP_TO_LOCAL_HOME.S_STATESNP_RESP_TO_LOCAL_HOME.FWD_S_STATESNP_RESP_TO_LOCAL_HOME.FWD_I_STATESNP_RESP_TO_LOCAL_HOME.CONFLICTSNP_RESP_TO_LOCAL_HOME.WBSNP_RESP_TO_REMOTE_HOME.I_STATESNP_RESP_TO_REMOTE_HOME.S_STATESNP_RESP_TO_REMOTE_HOME.FWD_S_STATESNP_RESP_TO_REMOTE_HOME.FWD_I_STATESNP_RESP_TO_REMOTE_HOME.CONFLICTSNP_RESP_TO_REMOTE_HOME.WBSNP_RESP_TO_REMOTE_HOME.HITML3_HITS.READL3_HITS.WRITEL3_HITS.PROBEL3_HITS.ANYL3_MISS.READL3_MISS.WRITEL3_MISS.PROBEL3_MISS.ANYL3_LINES_IN.M_STATEL3_LINES_IN.E_STATEL3_LINES_IN.S_STATEL3_LINES_IN.F_STATEL3_LINES_IN.ANYL3_LINES_OUT.M_STATEL3_LINES_OUT.E_STATEL3_LINES_OUT.S_STATEL3_LINES_OUT.I_STATEL3_LINES_OUT.F_STATEL3_LINES_OUT.ANYGQ_SNOOP.GOTO_SGQ_SNOOP.GOTO_IGQ_SNOOP.GOTO_S_HIT_EGQ_SNOOP.GOTO_S_HIT_FGQ_SNOOP.GOTO_S_HIT_MGQ_SNOOP.GOTO_S_HIT_SGQ_SNOOP.GOTO_I_HIT_EGQ_SNOOP.GOTO_I_HIT_FGQ_SNOOP.GOTO_I_HIT_MGQ_SNOOP.GOTO_I_HIT_SQHL_REQUESTS.IOH_READSQHL_REQUESTS.IOH_WRITESQHL_REQUESTS.REMOTE_READSQHL_REQUESTS.REMOTE_WRITESQHL_REQUESTS.LOCAL_READSQHL_REQUESTS.LOCAL_WRITESQHL_CYCLES_FULL.IOHQHL_CYCLES_FULL.REMOTEQHL_CYCLES_FULL.LOCALQHL_CYCLES_NOT_EMPTY.IOHQHL_CYCLES_NOT_EMPTY.REMOTEQHL_CYCLES_NOT_EMPTY.LOCALQHL_OCCUPANCY.IOHQHL_OCCUPANCY.REMOTEQHL_OCCUPANCY.LOCALQHL_ADDRESS_CONFLICTS.2WAYQHL_ADDRESS_CONFLICTS.3WAYQHL_CONFLICT_CYCLES.IOHQHL_CONFLICT_CYCLES.REMOTEQHL_CONFLICT_CYCLES.LOCALQHL_TO_QMC_BYPASSQMC_ISOC_FULL.READ.CH0QMC_ISOC_FULL.READ.CH1QMC_ISOC_FULL.READ.CH2QMC_ISOC_FULL.WRITE.CH0QMC_ISOC_FULL.WRITE.CH1QMC_ISOC_FULL.WRITE.CH2QMC_BUSY.READ.CH0QMC_BUSY.READ.CH1QMC_BUSY.READ.CH2QMC_BUSY.WRITE.CH0QMC_BUSY.WRITE.CH1QMC_BUSY.WRITE.CH2QMC_OCCUPANCY.CH0QMC_OCCUPANCY.CH1QMC_OCCUPANCY.CH2QMC_OCCUPANCY.ANYQMC_ISSOC_OCCUPANCY.CH0QMC_ISSOC_OCCUPANCY.CH1QMC_ISSOC_OCCUPANCY.CH2QMC_ISSOC_READS.ANYQMC_NORMAL_READS.CH0QMC_NORMAL_READS.CH1QMC_NORMAL_READS.CH2QMC_NORMAL_READS.ANYQMC_HIGH_PRIORITY_READS.CH0QMC_HIGH_PRIORITY_READS.CH1QMC_HIGH_PRIORITY_READS.CH2QMC_HIGH_PRIORITY_READS.ANYQMC_CRITICAL_PRIORITY_READS.CH0QMC_CRITICAL_PRIORITY_READS.CH1QMC_CRITICAL_PRIORITY_READS.CH2QMC_CRITICAL_PRIORITY_READS.ANYQMC_WRITES.FULL.CH0QMC_WRITES.FULL.CH1QMC_WRITES.FULL.CH2QMC_WRITES.FULL.ANYQMC_WRITES.PARTIAL.C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_MISSL2_RQSTS.RFOSL2_RQSTS.IFETCH_HITL2_RQSTS.IFETCH_MISSL2_RQSTS.IFETCHESL2_RQSTS.PREFETCH_HITL2_RQSTS.PREFETCH_MISSL2_RQSTS.PREFETCHESL2_RQSTS.MISSL2_RQSTS.REFERENCESL2_DATA_RQSTS.DEMAND.I_STATEL2_DATA_RQSTS.DEMAND.S_STATEL2_DATA_RQSTS.DEMAND.E_STATEL2_DATA_RQSTS.DEMAND.M_STATEL2_DATA_RQSTS.DEMAND.MESIL2_DATA_RQSTS.PREFETCH.I_STATEL2_DATA_RQSTS.PREFETCH.S_STATEL2_DATA_RQSTS.PREFETCH.E_STATEL2_DATA_RQSTS.PREFETCH.M_STATEL2_DATA_RQSTS.PREFETCH.MESIL2_DATA_RQSTS.ANYL2_WRITE.RFO.I_STATEL2_WRITE.RFO.S_STATEL2_WRITE.RFO.M_STATEL2_WRITE.RFO.HITL2_WRITE.RFO.MESIL2_WRITE.LOCK.I_STATEL2_WRITE.LOCK.S_STATEL2_WRITE.LOCK.E_STATEL2_WRITE.LOCK.M_STATEL2_WRITE.LOCK.HITL2_WRITE.LOCK.MESIL1D_WB_L2.I_STATEL1D_WB_L2.S_STATEL1D_WB_L2.E_STATEL1D_WB_L2.M_STATEL1D_WB_L2.MESIL3_LAT_CACHE.REFERENCEL3_LAT_CACHE.MISSCPU_CLK_UNHALTED.THREAD_PCPU_CLK_UNHALTED.REF_PDTLB_MISSES.ANYDTLB_MISSES.WALK_COMPLETEDDTLB_MISSES.WALK_CYCLESDTLB_MISSES.STLB_HITDTLB_MISSES.LARGE_WALK_COMPLETEDLOAD_HIT_PREL1D_PREFETCH.REQUESTSL1D_PREFETCH.MISSL1D_PREFETCH.TRIGGERSEPT.WALK_CYCLESL1D.REPLL1D.M_REPLL1D.M_EVICTL1D.M_SNOOP_EVICTL1D_CACHE_PREFETCH_LOCK_FB_HITL1D_CACHE_LOCK_FB_HITOFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATAOFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODEOFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFOOFFCORE_REQUESTS_OUTSTANDING.ANY.READCACHE_LOCK_CYCLES.L1D_L2CACHE_LOCK_CYCLES.L1DIO_TRANSACTIONSL1I.HITSL1I.MISSESL1I.READSL1I.CYCLES_STALLEDLARGE_ITLB.HITITLB_MISSES.ANYITLB_MISSES.WALK_COMPLETEDITLB_MISSES.WALK_CYCLESITLB_MISSES.LARGE_WALK_COMPLETEDILD_STALL.LCPILD_STALL.MRUILD_STALL.IQ_FULLILD_STALL.REGENILD_STALL.ANYBR_INST_EXEC.CONDBR_INST_EXEC.DIRECTBR_INST_EXEC.INDIRECT_NON_CALLBR_INST_EXEC.NON_CALLSBR_INST_EXEC.RETURN_NEARBR_INST_EXEC.DIRECT_NEAR_CALLBR_INST_EXEC.INDIRECT_NEAR_CALLBR_INST_EXEC.NEAR_CALLSBR_INST_EXEC.TAKENBR_INST_EXEC.ANYBR_MISP_EXEC.CONDBR_MISP_EXEC.DIRECTBR_MISP_EXEC.INDIRECT_NON_CALLBR_MISP_EXEC.NON_CALLSBR_MISP_EXEC.RETURN_NEARBR_MISP_EXEC.DIRECT_NEAR_CALLBR_MISP_EXEC.INDIRECT_NEAR_CALLBR_MISP_EXEC.NEAR_CALLSBR_MISP_EXEC.TAKENBR_MISP_EXEC.ANYRESOURCE_STALLS.ANYRESOURCE_STALLS.LOADRESOURCE_STALLS.RS_FULLRESOURCE_STALLS.STORERESOURCE_STALLS.ROB_FULLRESOURCE_STALLS.FPCWRESOURCE_STALLS.MXCSRRESOURCE_STALLS.OTHERMACRO_INSTS.FUSIONS_DECODEDBACLEAR_FORCE_IQLSD.UOPSITLB_FLUSHOFFCORE_REQUESTS.DEMAND.READ_DATAOFFCORE_REQUESTS.DEMAND.READ_CODEOFFCORE_REQUESTS.DEMAND.RFOOFFCORE_REQUESTS.ANY.READOFFCORE_REQUESTS.ANY.RFOOFFCORE_REQUESTS.L1D_WRITEBACKOFFCORE_REQUESTS.ANYUOPS_EXECUTED.PORT0UOPS_EXECUTED.PORT1UOPS_EXECUTED.PORT2_COREUOPS_EXECUTED.PORT3_COREUOPS_EXECUTED.PORT4_COREUOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5UOPS_EXECUTED.PORT5UOPS_EXECUTED.CORE_ACTIVE_CYCLESUOPS_EXECUTED.PORT015UOPS_EXECUTED.PORT234OFFCORE_REQUESTS_SQ_FULLSNOOPQ_REQUESTS_OUTSTANDING.DATASNOOPQ_REQUESTS_OUTSTANDING.INVALIDATESNOOPQ_REQUESTS_OUTSTANDING.CODESNOOPQ_REQUESTS.CODESNOOPQ_REQUESTS.DATASNOOPQ_REQUESTS.INVALIDATEOFF_CORE_RESPONSE_0SNOOP_RESPONSE.HITSNOOP_RESPONSE.HITESNOOP_RESPONSE.HITMOFF_CORE_RESPONSE_1INST_RETIRED.ANY_PINST_RETIRED.X87INST_RETIRED.MMXUOPS_RETIRED.ANYUOPS_RETIRED.RETIRE_SLOTSUOPS_RETIRED.MACRO_FUSEDMACHINE_CLEARS.CYCLESMACHINE_CLEARS.MEM_ORDERMACHINE_CLEARS.SMCBR_INST_RETIRED.ANY_PBR_INST_RETIRED.CONDITIONALBR_INST_RETIRED.NEAR_CALLBR_INST_RETIRED.ALL_BRANCHESBR_MISP_RETIRED.ANY_PBR_MISP_RETIRED.CONDITIONALBR_MISP_RETIRED.NEAR_CALLBR_MISP_RETIRED.ALL_BRANCHESSSEX_UOPS_RETIRED.PACKED_SINGLESSEX_UOPS_RETIRED.SCALAR_SINGLESSEX_UOPS_RETIRED.PACKED_DOUBLESSEX_UOPS_RETIRED.SCALAR_DOUBLESSEX_UOPS_RETIRED.VECTOR_INTEGERITLB_MISS_RETIREDMEM_LOAD_RETIRED.L1D_HITMEM_LOAD_RETIRED.L2_HITMEM_LOAD_RETIRED.L3_UNSHARED_HITMEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITMMEM_LOAD_RETIRED.L3_MISSMEM_LOAD_RETIRED.HIT_LFBMEM_LOAD_RETIRED.DTLB_MISSFP_MMX_TRANS.TO_FPFP_MMX_TRANS.TO_MMXFP_MMX_TRANS.ANYMACRO_INSTS.DECODEDUOPS_DECODED.STALL_CYCLESUOPS_DECODED.MSUOPS_DECODED.ESP_FOLDINGUOPS_DECODED.ESP_SYNCRAT_STALLS.FLAGSRAT_STALLS.REGISTERSRAT_STALLS.ROB_READ_PORTRAT_STALLS.SCOREBOARDRAT_STALLS.ANYES_REG_RENAMESUOP_UNFUSIONBPU_MISSED_CALL_RETBACLEAR.CLEARBACLEAR.BAD_TARGETBPU_CLEARS.EARLYBPU_CLEARS.LATETHREAD_ACTIVEL2_TRANSACTIONS.LOADL2_TRANSACTIONS.RFOL2_TRANSACTIONS.IFETCHL2_TRANSACTIONS.PREFETCHL2_TRANSACTIONS.L1D_WBL2_TRANSACTIONS.FILLL2_TRANSACTIONS.WBL2_TRANSACTIONS.ANYL2_LINES_IN.S_STATEL2_LINES_IN.E_STATEL2_LINES_IN.ANYL2_LINES_OUT.DEMAND_CLEANL2_LINES_OUT.DEMAND_DIRTYL2_LINES_OUT.PREFETCH_CLEANL2_LINES_OUT.PREFETCH_DIRTYL2_LINES_OUT.ANYSQ_MISC.LRU_HINTSSQ_MISC.SPLIT_LOCKSQ_FULL_STALL_CYCLESFP_ASSIST.ALLFP_ASSIST.OUTPUTFP_ASSIST.INPUTSIMD_INT_64.PACKED_MPYSIMD_INT_64.PACKED_SHIFTSIMD_INT_64.PACKSIMD_INT_64.UNPACKSIMD_INT_64.PACKED_LOGICALSIMD_INT_64.PACKED_ARITHSIMD_INT_64.SHUFFLE_MOVELD_BLOCKS.DATA_UNKNOWNLD_BLOCKS.STORE_FORWARDLD_BLOCKS.NO_SRLD_BLOCKS.ALL_BLOCKMISALIGN_MEM_REF.LOADSMISALIGN_MEM_REF.STORESLD_BLOCKS_PARTIAL.ADDRESS_ALIASLD_BLOCKS_PARTIAL.ALL_STA_BLOCKDTLB_LOAD_MISSES.MISS_CAUSES_A_WALKDTLB_LOAD_MISSES.WALK_DURATIONINT_MISC.RECOVERY_CYCLESINT_MISC.RAT_STALL_CYCLESFP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLEFP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLEFP_COMP_OPS_EXE.SSE_PACKED_SINGLEFP_COMP_OPS_EXE.SSE_SCALAR_DOUBLESIMD_FP_256.PACKED_SINGLESIMD_FP_256.PACKED_DOUBLEARITH.FPU_DIV_ACTIVEINSTS_WRITTEN_TO_IQ.INSTSL2_RQSTS.DEMAND_DATA_RD_HITL2_RQSTS.ALL_DEMAND_DATA_RDL2_RQSTS.RFO_HITSL2_RQSTS.ALL_RFOL2_RQSTS.CODE_RD_HITL2_RQSTS.CODE_RD_MISSL2_RQSTS.ALL_CODE_RDL2_RQSTS.PF_HITL2_RQSTS.PF_MISSL2_RQSTS.ALL_PFL2_STORE_LOCK_RQSTS.MISSL2_STORE_LOCK_RQSTS.HIT_EL2_STORE_LOCK_RQSTS.HIT_ML2_STORE_LOCK_RQSTS.ALLL2_L1D_WB_RQSTS.MISSL2_L1D_WB_RQSTS.HIT_SL2_L1D_WB_RQSTS.HIT_EL2_L1D_WB_RQSTS.HIT_ML2_L1D_WB_RQSTS.ALLLONGEST_LAT_CACHE.REFERENCELONGEST_LAT_CACHE.MISSCPU_CLK_THREAD_UNHALTED.REF_XCLKL1D_PEND_MISS.PENDINGDTLB_STORE_MISSES.MISS_CAUSES_A_WALKDTLB_STORE_MISSES.WALK_COMPLETEDDTLB_STORE_MISSES.WALK_DURATIONDTLB_STORE_MISSES.STLB_HITLOAD_HIT_PRE.SW_PFLOAD_HIT_PRE.HW_PFHW_PRE_REQ.DL1_MISSL1D.REPLACEMENTL1D.ALLOCATED_IN_ML1D.EVICTIONL1D.ALL_M_REPLACEMENTPARTIAL_RAT_STALLS.FLAGS_MERGE_UOPPARTIAL_RAT_STALLS.SLOW_LEA_WINDOWPARTIAL_RAT_STALLS.MUL_SINGLE_UOPRESOURCE_STALLS2.ALL_FL_EMPTYRESOURCE_STALLS2.ALL_PRF_CONTROLRESOURCE_STALLS2.BOB_FULLRESOURCE_STALLS2.OOO_RSRCCPL_CYCLES.RING0CPL_CYCLES.RING123RS_EVENTS.EMPTY_CYCLESOFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RDOFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFOOFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RDLOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATIONLOCK_CYCLES.CACHE_LOCK_DURATIONIDQ.EMPTYIDQ.MITE_UOPSIDQ.DSB_UOPSIDQ.MS_DSB_UOPSIDQ.MS_MITE_UOPSIDQ.MS_UOPSICACHE.MISSESITLB_MISSES.MISS_CAUSES_A_WALKITLB_MISSES.WALK_DURATIONITLB_MISSES.STLB_HITBR_INST_EXEC.DIRECT_JMPBR_INST_EXEC.INDIRECT_JMP_NON_CALL_RETBR_INST_EXEC.NONTAKENBR_INST_EXE.ALL_BRANCHESBR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RETBR_MISP_EXEC.NONTAKENBR_MISP_EXEC.ALL_BRANCHESIDQ_UOPS_NOT_DELIVERED.COREUOPS_DISPATCHED_PORT.PORT_0UOPS_DISPATCHED_PORT.PORT_1UOPS_DISPATCHED_PORT.PORT_2_LDUOPS_DISPATCHED_PORT.PORT_2_STAUOPS_DISPATCHED_PORT.PORT_2UOPS_DISPATCHED_PORT.PORT_3_LDUOPS_DISPATCHED_PORT.PORT_3_STAUOPS_DISPATCHED_PORT.PORT_3UOPS_DISPATCHED_PORT.PORT_4UOPS_DISPATCHED_PORT.PORT_5RESOURCE_STALLS.LBRESOURCE_STALLS.RSRESOURCE_STALLS.SBRESOURCE_STALLS.ROBRESOURCE_STALLS.FCSWCYCLE_ACTIVITY.CYCLES_L2_PENDINGCYCLE_ACTIVITY.CYCLES_L1D_PENDINGCYCLE_ACTIVITY.CYCLES_NO_DISPATCHDSB2MITE_SWITCHES.COUNTDSB2MITE_SWITCHES.PENALTY_CYCLESDSB_FILL.OTHER_CANCELDSB_FILL.EXCEED_DSB_LINESDSB_FILL.ALL_CANCELITLB.ITLB_FLUSHOFFCORE_REQUESTS.DEMAND_DATA_RDOFFCORE_REQUESTS.DEMAND_RFOOFFCORE_REQUESTS.ALL_DATA_RDUOPS_DISPATCHED.THREADUOPS_DISPATCHED.COREOFFCORE_REQUESTS_BUFFER.SQ_FULLAGU_BYPASS_CANCEL.COUNTTLB_FLUSH.DTLB_THREADTLB_FLUSH.STLB_ANYL1D_BLOCKS.BANK_CONFLICT_CYCLESINST_RETIRED.ALLOTHER_ASSISTS.ITLB_MISS_RETIREDOTHER_ASSISTS.AVX_STOREOTHER_ASSISTS.AVX_TO_SSEOTHER_ASSISTS.SSE_TO_AVXUOPS_RETIRED.ALLMACHINE_CLEARS.MEMORY_ORDERINGMACHINE_CLEARS.MASKMOVBR_INST_RETIRED.ALL_BRANCHBR_INST_RETIRED.NEAR_RETURNBR_INST_RETIRED.NOT_TAKENBR_INST_RETIRED.NEAR_TAKENBR_INST_RETIRED.FAR_BRANCHBR_MISP_RETIRED.ALL_BRANCHES_PSBR_MISP_RETIRED.NOT_TAKENBR_MISP_RETIRED.TAKENFP_ASSIST.X87_OUTPUTFP_ASSIST.X87_INPUTFP_ASSIST.SIMD_OUTPUTFP_ASSIST.SIMD_INPUTFP_ASSIST.ANYROB_MISC_EVENTS.LBR_INSERTSMEM_TRANS_RETIRED.LOAD_LATENCYMEM_TRANS_RETIRED.PRECISE_STOREMEM_UOP_RETIRED.STLB_MISS_LOADSMEM_UOP_RETIRED.STLB_MISS_STORESMEM_UOP_RETIRED.LOCK_LOADSMEM_UOP_RETIRED.SPLIT_LOADSMEM_UOP_RETIRED.SPLIT_STORESMEM_UOP_RETIRED.ALL_LOADSMEM_UOP_RETIRED.ALL_STORESMEM_LOAD_UOPS_RETIRED.L1_HITMEM_LOAD_UOPS_RETIRED.L2_HITMEM_LOAD_UOPS_RETIRED.LLC_HITMEM_LOAD_UOPS_RETIRED.LLC_MISSMEM_LOAD_UOPS_RETIRED.HIT_LFBMEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISSMEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITMEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITMMEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONEMEM_LOAD_UOPS_LLC_HIT_RETIRED.ALLMEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAMMEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAMMEM_LOAD_UOPS_MISC_RETIRED.LLC_MISSBACLEARS.ANYL2_TRANS.DEMAND_DATA_RDL2_TRANS.RFOL2_TRANS.CODE_RDL2_TRANS.ALL_PFL2_TRANS.L1D_WBL2_TRANS.L2_FILLL2_TRANS.L2_WBL2_TRANS.ALL_REQUESTSL2_LINES_IN.IL2_LINES_IN.SL2_LINES_IN.EL2_LINES_IN.ALLL2_LINES_OUT.PF_CLEANL2_LINES_OUT.PF_DIRTYL2_LINES_OUT.DIRTY_ALLINST_RETIRED.PREC_DISTDTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALKDTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETEDDTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATIONUOPS_ISSUED.FLAGS_MERGEUOPS_ISSUED.SLOW_LEAUOPS_ISSUED.SINGLE_MULMOVE_ELIMINATION.INT_NOT_ELIMINATEDMOVE_ELIMINATION.SIMD_NOT_ELIMINATEDMOVE_ELIMINATION.INT_ELIMINATEDMOVE_ELIMINATION.SIMD_ELIMINATEDOFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RDIDQ.ALL_DSB_CYCLES_ANY_UOPSIDQ.ALL_DSB_CYCLES_4_UOPSIDQ.ALL_MITE_CYCLES_ANY_UOPSIDQ.ALL_MITE_CYCLES_4_UOPSIDQ.MITE_ALL_UOPSBR_INST_EXEC.ALL_BRANCHESCYCLE_ACTIVITY.CYCLES_LDM_PENDINGCYCLE_ACTIVITY.CYCLES_NO_EXECUTEOFFCORE_REQUESTS.DEMAND_CODE_RDUOPS_EXECUTED.THREADUOPS_EXECUTED.COREMEM_UOP_RETIRED.LOADSMEM_UOP_RETIRED.STORESMEM_UOP_RETIRED.STLB_MISSMEM_UOP_RETIRED.LOCKMEM_UOP_RETIRED.SPLITMEM_UOP_RETIRED.ALLMEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITMMEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWDTLB_ACCESS.LOAD_STLB_HITDTLB_LOAD_MISSES.WALK_COMPLETED_4KDTLB_LOAD_MISSES.WALK_COMPLETED_2M_4KDTLB_LOAD_MISSES.STLB_HIT_4KDTLB_LOAD_MISSES.STLB_HIT_2MDTLB_LOAD_MISSES.PDE_CACHE_MISSUOPS_ISSUED.SiNGLE_MULL2_RQSTS.DEMAND_DATA_RD_MISSL2_RQSTS.ALL_DEMAND_MISSL2_RQSTS.ALL_DEMAND_REFERENCESL2_RQSTS.L2_PF_HITL2_RQSTS.L2_PF_MISSL2_DEMAND_RQSTS.WB_HITDTLB_STORE_MISSES.WALK_COMPLETED_4KDTLB_STORE_MISSES.WALK_COMPLETED_2M_4MDTLB_STORE_MISSES.STLB_HIT_4KDTLB_STORE_MISSES.STLB_HIT_2MDTLB_STORE_MISSES.PDE_CACHE_MISSMOVE_ELIMINATION.SMID_NOT_ELIMINATEDMOVE_ELIMINATION.SMID_ELIMINATEDOFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RDITLB_MISSES.WALK_COMPLETED_4KTLB_MISSES.WALK_COMPLETED_2M_4MITLB_MISSES.STLB_HIT_4KITLB_MISSES.STLB_HIT_2MUOPS_EXECUTED_PORT.PORT_0UOPS_EXECUTED_PORT.PORT_1UOPS_EXECUTED_PORT.PORT_2UOPS_EXECUTED_PORT.PORT_3UOPS_EXECUTED_PORT.PORT_4UOPS_EXECUTED_PORT.PORT_5UOPS_EXECUTED_PORT.PORT_6UOPS_EXECUTED_PORT.PORT_7CYCLE_ACTIVITY.STALLS_L2_PENDINGPAGE_WALKER_LOADS.DTLB_L1PAGE_WALKER_LOADS.ITLB_L1PAGE_WALKER_LOADS.DTLB_L2PAGE_WALKER_LOADS.ITLB_L2PAGE_WALKER_LOADS.DTLB_L3PAGE_WALKER_LOADS.ITLB_L3PAGE_WALKER_LOADS.DTLB_MEMORYPAGE_WALKER_LOADS.ITLB_MEMORYOTHER_ASSISTS.ANY_WB_ASSISTMEM_LOAD_UOPS_RETIRED.L2_MISSDTLB_LOAD_MISSES.LARGE_WALK_COMPLETEDMEM_UNCORE_RETIRED.L3_DATA_MISS_UNKNOWNMEM_UNCORE_RETIRED.OTHER_CORE_L2_HITMMEM_UNCORE_RETIRED.REMOTE_CACHE_LOCAL_HOME_HITL1D_CACHE_LD.I_STATEL1D_CACHE_LD.S_STATEL1D_CACHE_LD.E_STATEL1D_CACHE_LD.M_STATEL1D_CACHE_LD.MESIL1D_CACHE_ST.S_STATEL1D_CACHE_ST.E_STATEL1D_CACHE_ST.M_STATEL1D_CACHE_LOCK.HITL1D_CACHE_LOCK.S_STATEL1D_CACHE_LOCK.E_STATEL1D_CACHE_LOCK.M_STATEL1D_ALL_REF.ANYL1D_ALL_REF.CACHEABLEDTLB_MISSES.PDE_MISSSB_FORWARD.ANYLOAD_BLOCK.STDLOAD_BLOCK.ADDRESS_OFFSETSB_DRAIN.CYCLESMISALIGN_MEM_REF.LOADMISALIGN_MEM_REF.STOREMISALIGN_MEM_REF.ANYSTORE_BLOCKS.NOT_STASTORE_BLOCKS.STASTORE_BLOCKS.ANYDTLB_LOAD_MISSES.PDP_MISSMEMORY_DISAMBIGURATION.RESETMEMORY_DISAMBIGURATION.SUCCESSMEMORY_DISAMBIGURATION.WATCHDOGMEMORY_DISAMBIGURATION.WATCH_CYCLESHW_INT.RCVHW_INT.CYCLES_MASKEDHW_INT.CYCLES_PENDING_AND_MASKEDL2_WRITE.RFO.E_STATEUOPS_DECODED.DEC0L1D_CACHE_ST.I_STATEL1D_CACHE_ST.MESIL1D_PEND_MISS.LOAD_BUFFERS_FULLDTLB_MISSES.PDP_MISSSSE_MEM_EXEC.NTASSE_MEM_EXEC.STREAMING_STORESSFENCE_CYCLESEPT.EPDE_MISSEPT.EPDPE_HITEPT.EPDPE_MISSIFU_IVC.FULLIFU_IVC.L1I_EVICTIONL1I_OPPORTUNISTIC_HITSITLB_MISSES.PMH_BUSY_CYCLESITLB_MISSES.PDE_MISSITLB_MISSES.PDP_MISSOFFCORE_REQUESTS.UNCACHED_MEMPIC_ACCESSES.TPR_READSPIC_ACCESSES.TPR_WRITESMACHINE_CLEARS.FUSION_ASSISTBOGUS_BRBPU_CLEARS.ANYL2_HW_PREFETCH.HITL2_HW_PREFETCH.ALLOCL2_HW_PREFETCH.DATA_TRIGGERL2_HW_PREFETCH.CODE_TRIGGERL2_HW_PREFETCH.DCA_TRIGGERL2_HW_PREFETCH.KICK_STARTSQ_MISC.PROMOTIONSQ_MISC.PROMOTION_POST_GOSQ_MISC.FILL_DROPPEDBR_INST_RETIRED.ANYBR_INST_RETIRED.MISPREDBR_INST_RETIRED.MISPRED_NOT_TAKENBR_INST_RETIRED.MISPRED_TAKENBR_INST_RETIRED.PRED_NOT_TAKENBR_INST_RETIRED.PRED_TAKENBR_INST_RETIRED.TAKENBR_TKN_BUBBLE_1BR_TKN_BUBBLE_2BUSQ_EMPTYBUS_IO_WAITBUS_REQUEST_OUTSTANDINGBUS_TRANS_ANYBUS_TRANS_BRDBUS_TRANS_BURSTBUS_TRANS_DEFBUS_TRANS_IFETCHBUS_TRANS_INVALBUS_TRANS_MEMBUS_TRANS_PWRBUS_TRANS_RFOCMP_SNOOPCPU_CLK_UNHALTED.BUSCPU_CLK_UNHALTED.CORE_PCPU_CLK_UNHALTED.NO_OTHERCYCLES_L1I_MEM_STALLEDDELAYED_BYPASS.FPDELAYED_BYPASS.LOADDELAYED_BYPASS.SIMDDTLB_MISSES.L0_MISS_LDDTLB_MISSES.MISS_LDDTLB_MISSES.MISS_STEIST_TRANSESP.ADDITIONSESP.SYNCHEXT_SNOOPFP_COMP_OPS_EXEFP_MMX_TRANS_TO_FPFP_MMX_TRANS_TO_MMXHW_INT_RCVIDLE_DURING_DIVINST_QUEUE.FULLINST_RETIRED.LOADSINST_RETIRED.OTHERINST_RETIRED.STORESINST_RETIRED.VM_HITLB.FLUSHITLB.LARGE_MISSITLB.MISSESITLB.SMALL_MISSL1D_ALL_CACHE_REFL1D_ALL_REFL1D_CACHE_LDL1D_CACHE_LOCKL1D_CACHE_LOCK_DURATIONL1D_CACHE_STL1D_M_EVICTL1D_M_REPLL1D_PEND_MISSL1D_REPLL1D_SPLIT.LOADSL1D_SPLIT.STORESL1I_MISSESL1I_READSL2_LOCKL2_M_LINES_INL2_M_LINES_OUTL2_NO_REQL2_REJECT_BUSQL2_RQSTS.SELF.DEMAND.I_STATEL2_RQSTS.SELF.DEMAND.MESILOAD_BLOCK.L1DLOAD_BLOCK.STALOAD_BLOCK.UNTIL_RETIREMACHINE_NUKES.MEM_ORDERMACHINE_NUKES.SMCMACRO_INSTS.CISC_DECODEDMEMORY_DISAMBIGUATION.RESETMEMORY_DISAMBIGUATION.SUCCESSMEM_LOAD_RETIRED.L1D_LINE_MISSMEM_LOAD_RETIRED.L1D_MISSMEM_LOAD_RETIRED.L2_LINE_MISSMEM_LOAD_RETIRED.L2_MISSPAGE_WALKS.COUNTPAGE_WALKS.CYCLESPREF_RQSTS_DNPREF_RQSTS_UPRAT_STALLS.FPSWRAT_STALLS.OTHER_SERIALIZATION_STALLSRAT_STALLS.PARTIAL_CYCLESRESOURCE_STALLS.BR_MISS_CLEARRESOURCE_STALLS.LD_STRS_UOPS_DISPATCHEDRS_UOPS_DISPATCHED.PORT0RS_UOPS_DISPATCHED.PORT1RS_UOPS_DISPATCHED.PORT2RS_UOPS_DISPATCHED.PORT3RS_UOPS_DISPATCHED.PORT4RS_UOPS_DISPATCHED.PORT5SB_DRAIN_CYCLESSEG_REG_RENAMES.ANYSEG_REG_RENAMES.DSSEG_REG_RENAMES.ESSEG_REG_RENAMES.FSSEG_REG_RENAMES.GSSEG_RENAME_STALLS.ANYSEG_RENAME_STALLS.DSSEG_RENAME_STALLS.ESSEG_RENAME_STALLS.FSSEG_RENAME_STALLS.GSSIMD_ASSISTSIMD_COMP_INST_RETIRED.PACKED_DOUBLESIMD_COMP_INST_RETIRED.PACKED_SINGLESIMD_COMP_INST_RETIRED.SCALAR_DOUBLESIMD_COMP_INST_RETIRED.SCALAR_SINGLESIMD_INSTR_RETIREDSIMD_INST_RETIRED.ANYSIMD_INST_RETIRED.PACKED_DOUBL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